While machine translation has greatly improved, an embedded lightweight energy-efficient hardware remains elusive because existing solutions based on artificial neural networks (NNs) are computation-intensive and energy-hungry requiring server-based implementations, which also raises data protection and privacy concerns. Today, 2D electronic architectures suffer from "unscalable" interconnects, making it difficult for them to compete with biological neural systems in terms of real-time information-processing capabilities with comparable energy consumption. Recent advances in materials science, device technology and synaptic architectures have the potential to fill this gap with novel disruptive technologies that go beyond conventional CMOS technology. A promising solution comes from vertical nanowire field-effect transistors (VNWFETs) to unlock the full potential of truly 3D neuromorphic computing performance and density. Through actual VNWFETs fabrication setting up a design-technology co-optimization approach, the FVLLMONTI vision is to develop regular 3D stacked hardware layers of NNs empowering the most efficient machine translation thanks to a fine-grain hardware / software co-optimisation. FVLLMONTI consortium is a strong partnership with complementary expertise and extensive track-records in the fields of nanoelectronics, unconventional logic design, reliability, system‐level design, machine translation, cognition sciences. The consortium is composed of 50% of junior researchers and 90% of first-time participants to FETPROACT.  

FVLLMONTI is organized around 4 specific objectives (OBJ) targeting 12 Key Performance Indicators (KPI) mastered through 16 Milestones (MS):

Objective 1: Compactness: From fabricated low-complexity hardware to minimal neural network compute cube (N2C2)

Specific objective 1 (OBJ1) concentrates on the compactness of the elements in the FVLLMONTI value chain from low-level logic blocks up to a critical compute function in N2C2 to ensure the computation resource footprint.

Objective 2: Performance: Energy-delay-product assessment of the computational layer, the embedded Non-Volatile Memory (e-NVM) and interconnects

Specific Objective 2 (OBJ2) is designed to quantify the conventional figure-of-merit energy-delay-product (EDP) towards fast and ultra-low-power data transfer between the e-NVM using ferroelectric-gated VNWFET and the computing layer, thereby addressing the whole FVLLMONTI value chain from low-level logic blocks up to a critical compute function in N2C2.

Objective 3: Validation of the VNWFET technology for live English-French streaming speech recognition to text

Specific Objective 3 (OBJ3) focuses on exploring the use of VNWFET-based 3D logic cells and e-NVM blocks in multiple layers of NNs enabling ultra-compact and energy-efficient Transformers NNs for Automatic Speech Recognition (ASR) and Machine translation (MT). Their compactness and EDP will be compared with general-purpose architectures with CNN accelerators. To validate the approach, the target application is live English-French streaming speech recognition to text.

Objective 4: 3D NN architecture robustness

Specific Objective 4 (OBJ4) assesses the reliability of VNWFET devices at the early step of their development. The impact of the identified wear out failure mechanisms will be appraised on the whole FVLLMONTI value chain: N2C2, 3D NN architecture and up to the ASR and MT application. Beyond the specific translation application, the final intent is to demonstrate the intrinsic 3D NN architecture robustness.

WP5 NN Transformer architecture - lead by Giovanni Ansaloni (EPFL)






KPI4: EDP assessment for JL VNWFETs, ION of at least 300 µA/µm at a supply voltage below 0.9V with scaled gate length

KPI5: EDP assessment for PC VNWFETs, ION of at least 10 µA/µm at a supply voltage below 2 V

KPI6: EDP assessment for read and write operation of a single transistor ferroelectric VNWFET cell with 3 V write voltage and 2 V operation voltage or below

KPI7: EDP assessment of 1-bit FA designs exploiting reconfigurability and/or e-NVM function

KPI8: NN compression size

KPI9: For ASR and MT 

KPI10: Word Error Rate (WER) on read English and French

KPI11: Bi-Lingual Evaluation Understudy (BLEU) score

KPI12: Intrinsic 3D NN architecture robustness, irrespective of the application: Architectural Vulnerability Factor (AVF)  






video / video

partners / contact


[ UBx ]


Cristell MANEUX

Cristell MANEUX

Project Coordinator. Full Professor at IMS Laboratory, Department of Sciences and Engineering, University of Bordeaux, France.






WP1 Leader. Research Director at Laboratory for Analysis and Architecture of Systems, CNRS-LAAS, France.




Ian O'Connor

Ian O'Connor

WP4 Leader. Distinguished Professor at Ecole Centrale de Lyon, France.


[ GTS ]




WP3 Leader. Chief Operating Officer at Global TCAD Solutions GmbH, Austria.


[ EPFL ]




WP5 Leader. Professor and Director of Embedded Systems Laboratory, EPFL, Switzerland.


[ NLB ]




WP6 Leader. Senior Scientist Emerging Devices at NaMLab gGmbH, Germany.

This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 101016776.

graph - chart

Start 01/01/2021
50% 26/03/2023
End 31/08/2025
Budget allocation . M€ Budget allocation
Effort 637 p*m Effort
Effort 11 persons Full time equivalent


E3AI - Bordeaux Summer School - Program online!


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E3AI Summer School - save the date


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Meet FVLLMONTI Experts at IEDM 2022


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Visit Prof. Hermann Ney in Bordeaux


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Full day progress meeting in Bordeaux


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Invited talk at the Design Automation and Test in Europe (DATE) 2022


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HiPEAC Article on FVLLMONTI now available


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Workshop at the HiPEAC Computing System Week


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1st Advisory Board meeting (Bordeaux, France)


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Invited paper at IEDM 2021, the 67th Annual International Electron Devices Meeting


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Video recording available for FVLLMONTI presentation at NEUROTECH


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NEUROTECH online event


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Energy Efficient Embedded AI - Bordeaux Summer School


Review Meeting 1st Reporting Period


1st Advisory Board Meeting


Project management plenary meeting


Kick-off FVLLMONTI project


Transformer model compression for end-to-end ...


Leila Ben Letaifa, Jean-Luc Rouas

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Extraction of small-signal equivalent circuit...


Bruno Neckel Wesling, Marina Deng, Chhandak Mukherjee, Magali de Matos, Abhishek Kumar, Guilhem Larrieu, Jens Trommer, Thomas Mikolajick, Cr...

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Challenges in Electron Beam Lithography of Si...


Cigdem Cakirlar, Giulio Galderisi, Christoph Beyer, Maik Simon, Thomas Mikolajick, Jens Trommer

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Reconfigurable Field Effect Transistors: A Te...


T Mikolajick, G Galderisi, S Rai, M Simon, R Böckle, M Sistani, C Cakirlar, N Bhattacharjee, T Mauersberger, A Heinzig, A Kumar, WM Web...

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Modelling of vertical and ferroelectric junct...


C. Maneux, C. Mukherjee, M. Deng, M. Dubourg, L. Reveil, G. Bordea, A. Lecestre, G. Larrieu, J. Trommer, E.T. Breyer, S. Slesazeck, T. Mikol...

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Compact modeling of 3D vertical junctionless ...


Mukherjee, C., Poittevin, A., O'Connor, I., Larrieu, G., Maneux, C.Solid-State Electronics, 183, art. no. 108125.

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3D Logic Cells Design and Results Based on Ve...


Mukherjee, C., Deng, M., Marc, F., Maneux, C., Poittevin, A., O'Connor, I., Beux, S.L., Marchand, C., Kumar, A., Lecestre, A., Larrieu,G...

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Patterning and integration issues of doped na...


Abhishek Kumar, Aurélie Lecestre, Jonas Müller , Guilhem Larrieu

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Single-step reactive ion etching process for ...


Tom Mauersberger, Jens Trommer, Saurabh Sharma, Martin Knaut, Darius Pohl, Bernd Rellinghaus, Thomas Mikolajick, André Heinzig

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3D Logic Cells Design and Results Based on Ve...


Poittevin, A., Mukherjee, C., O’Connor, I., Maneux, C., Larrieu, G., Deng, M., Le Beux, S., Marc, F., Lecestre, A., Marchand, C., Kuma...

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Compact Modeling of 3D Vertical Junctionless ...


Mukherjee, C., Larrieu, G., Maneux, C. 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration o...

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D04.05a Virtual scalable N2C 2 design and Pareto-front data - This document describes the first version of the virtual scalable Neural Network Compute Cube (N2C2). Its principal function is to carry out element-wise non-volatile matrix multiplication, accumulation and activation through a non-linear function.

D2.3 Parasitic Element Extraction - This document describes an elaborate methodology for the extraction of the extrinsic parasitic interconnects of the FVLLMONTI technology.

D5.1 Pre-trained speech ASR/MT model and use cases - V1 - This document presents the achievements of the WP5 partners during the first semester of the FVLLMONTI project. In this period, work has focused on developing Automatic Speech Recognition (ASR) and Machine Translation (MT) systems using state-of-the-art methods, including neural network transformer architecture.

D6.2 Plan for dissemination of the results – Year 1 - This Dissemination strategy gathers together all information regarding the dissemination of the FVLLMONTI project. The strategy helps conducting the dissemination and communication activities throughout the project by acting as a practical and regularly updated guide for the project members.

D6.3 Plan for dissemination of the results – Year 2 - This Dissemination strategy gathers together all information regarding the dissemination of the FVLLMONTI project. Dissemination activities over the first two years of the project are summarized and quantified.

D6.6 Data Management Plan - The FVLLMONTI Data Management Plan describes datasets generated and published during the duration of the project, providing an outline for handling data during the duration of the project and after the project is completed. This document provides a short summary of each dataset, describing how data will be made findable, accessible, interoperable, and reusable following the FAIR data principles. Finally for each dataset we consider how related costs will be covered and discuss data security and ethical aspects.

D6.7 Technology impact and exploitation innovation – Year 1 - This document describes the initial technology impact and exploitation action assessment associated with FVLLMONTI. The aims and visions of the project are set into the bigger overall socioeconomic context. It is described why the disruptive N2C2 concept based on emerging nanowire technologies can change the neuromorphic circuit market. Current market size and segmentation, as well as competitor technologies, are referenced.

D6.8 Technology impact and exploitation innovation – Year 2 - This document describes the first updated assessment of technology impact and exploitation action assessment associated with FVLLMONTI. It is described why the disruptive N2C2 concept based on emerging nanowire technologies can change the neuromorphic circuit market and ranks the key innovations targeted in the project.

D7.1 Project handbook - This project management handbook describes the project organisation and internal procedures of the FVLLMONTI project. This document aims to provide a written collection of rules that will govern the work of the consortium and a set of tools needed to facilitate the day-to-day management of the project.

FETCH 2023 Invited Presentation C. Maneux - Invited Presentation at FETCH Summer School 2023. How to reinvent the value chain with emerging technologies and new computing paradigms? Challenges in characterization, modelling and circuit design.

HiPEAC 2022 Article

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